Understanding Space-Grade Semiconductor Reliability and Qualification: From NewSpace to Traditional

Figure 1 : Packaging plastic parts for shipment.

To deliver the next generation of satellite services, spacecraft manufacturers are exploiting the integration, on-board processing and power consumption advantages of ultra deep-sub-micron semiconductors.

Many NewSpace companies are baselining commercial-grade semiconductors typically fabricated for producing high yields with large densities, fast speed and low power for consumer applications within a terrestrial environment, e.g. a lifetime between five to ten years and an operating temperature range from 0 to +70°C.

To provide better reliability, some NewSpace companies are using industrial or automotive-grade semiconductors with an extended temperature range from −40 to +110°C.

To provide further product assurance and traceability for space users, Enhanced Plastic guarantees parts from −55 to +125°C as well as batch management, e.g. no variation between foundries, lots and wafers. Some silicon vendors also offer QCOTS and COTS+ components which have been up-screened to a higher level of reliability to address known failure mechanisms for plastic parts. Burn-in tests identify and eliminate juvenile rejects, there are checks for humidity and out-gassing, as well as X-ray and C-SAM inspection to verify the integrity of the construction of the microchip. Formal standards exist for each of these assessments and some are carried out on a complete lot, whereas destructive investigation such as radiation testing is performed on a small sample.

To ship plastic parts, devices are first placed into specific ESD trays, strapped between ESD plates, dessicant packs and a humidity-level indicator added before being placed into a hermetic vacuumed bag. Finally, ESD protection forms provide protection against shock and vibration prior to boxing as shown below:

Figure 1 : Packaging plastic parts for shipment.

As an example of a screening and qualification flow to deliver plastic-packaged semiconductors for space applications, Teledyne e2v offers commercial-grade, multi-core, PowerPC or ARM-based microprocessors fabricated using a 45 nm SOI process as shown below. These can be delivered to the NASA qualification flow for plastic devices screened to eliminate early failures including static/dynamic burn-in, temperature-cycling and accelerated-stress tests, as well as visual, X-ray and C-SAM inspection to confirm the manufacture. Formal standards exist for each of these checks, e.g. MIL-STD-883, JESD22 etc… Depending on your mission’s reliability needs, e.g. continuous-availability GEO telecommunication, LEO small-satellite constellation or short-duration CubeSat, three different screening (quality) options can be procured.

Figure 2 : Plastic-packaged, commercial-grade microprocessors.

Traditional satellite manufacturers procure for existing builds, e.g. EM, EQM and FM. It’s very supplier specific, but in some cases, engineering samples for prototyping have only been tested at an ambient +25°C (please check with your provider!). Representative EQM parts will have been characterised from −55 to +125°C and completed many of the standard qualification tests. Flight-grade components will have completed the full qualification flow according to some certified quality level such as QML or ESCC.

To ship high-reliability ceramic parts, devices are first placed into specific ESD trays, strapped between ESD plates before being placed into a hermetic vacuumed bag. ESD protection forms provide protection against shock and vibration prior to packaging. Flight-grade components, together with a certificate of conformance and a data pack, are placed in a container which is then strapped and sealed as shown below:

Figure 3 : Packaging ceramic, space-grade parts for shipment.

As an example of a screening and qualification flow to deliver space-grade, hermetic, ceramic-packaged semiconductors, broadband ADCs and DACs are shown below. These can delivered to either QMLV SMD or ESCC EPPL which include endurance tests to eliminate early failures, e.g. burn-in and accelerated lifetime, as well as non-invasive and destructive electrical, mechanical and thermal checks to confirm device construction, e.g. loose particles (PIND), ESD, vibration and micro-sectioning. Formal standards exist for each of these assessments, e.g. MIL-STD-883, MIL-PRF-38535 etc… with the range of screening increasing from EM to EQM to FM.

Figure 4 : Hermetic, ceramic-packaged, space-grade ADC and DAC.

For non-hermetic, ceramic packages, a new DLA QMLY certification has been created to eliminate failures including wafer-lot acceptance tests, PIND checks, temperature cycling, accelerated burn-in, extended life as well as X-ray/C-SAM inspection to verify the integrity of the assembly. Formal standards exist for each of these assessments, e.g. MIL-STD-883, MIL-PRF-38535 etc… with the range of screening increasing from EM to EQM to FM. To be ESCC 9000 compliant, a minimum of 111 die from each lot have to be considered before devices can be formally certified and included in the EPPL.

Figure 5 : Non-hermetic, ceramic-packaged, 90 nm SOI, GHz microprocessor.

You can download or order a free poster which lists and compares screening levels for the various quality grades.


I will be broadcasting a webinar on, How to Use and Select COTS Components for Space Applications, on Wednesday 7th of November at 9 a.m. UK time. You can register at: https://events.genndi.com/register/169105139238461446/6588e42942.

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